The School of Engineering

Profile

Victor (Anglesea office A3.03) is a lecturer in digital electronics and microprocessor systems. He is the leader for the award of student prizes and the IEEE students liaison officer. Victor is a member of the Electronic, Control and Computer Engineering Group.

Examples of projects that he has available for final year students are:

• A 1-bit DAC in VHDL
• A MIDI Sound Module in VHDL
• Investigating a Banyan Switch in VHDL
• An Audio Spectrum Analyser in VHDL and FPGA
• FPGA programmable digital modulator
• Single Channel Active Noise Control System on FPGA (using VHDL)
• Data Compression on FPGA (using VHDL)
• FPGA Based Frequency Multiplier
• University Timetable Interface
• Modeling a digital neural net using VHDL
• VHDL - design of an ALU for FPGA
• VHDL - Development of Multiplier Architectures
• VHDL - based speaking Counter/Timer/Clock
• CRC & error correction encoder/decoders
• A Genetic Algorithm applied to the Cell Placement problem
• A Genetic Algorithm applied to scheduling problems
• The 'Force Directed' algorithm applied to cell placement problems
• Graphical Front end to VHDL
• CRC & error correction encoder/decoders
• An ASCII to Morse Code Generator using VHDL & FPGA